Protocol of MiniDS <=> PC communication
Select Clock
Sel Clock
CLK
1 0
0 0 PC via /CLK
0 1 0,2 MHz
1 0 2,0 MHz
1 1 20,0 MHz
Pin Name Bit Offset
2 SelCLK0 0 00H
3 SelCLK1 1 00H
15 D0 3 01H
13 D1 4 01H
12 D2 5 01H
10 D3 6 01H
11 /Ready 7 01H
1 SelRange 0 02H
14 /CLK 1 02H
16 CLR 2 02H
17 SelNibble 3 02H
Sample Block Cycle Using MiniDS Own Clock Source
1. Select Clock
2. Set CLR
3. Clear CLR
4. Set /CLK
5. Clear /CLK
6. Wait for /Ready = 1
7. Set SelCLK to PC clock (00)
FOR Bytes
8. Clear SelNibble
9. LowerNibble = Read from Offset 01H
10. LowerNibble = LowerNibbler AND 078H
11. Shift Right LowerNibble 3
12. Set SelNibble
13. HigherNibble = Read from Offset 01H
14. HigherNibble = HigherNibbler AND 078H
15. Shift Left HigherNibble 1
16. SampleValue = HigherNibble OR LowerNibble
17. Set /CLK
18. Clear /CLK
NEXT Byte
Sample Block Cycle Using The PC For Clock Source
1. Set SelCLK to PC clock (00)
2. Set CLR
3. Clear CLR
4. Set /CLK
5. Clear /CLK
FOR Bytes
8. Clear SelNibble
9. LowerNibble = Read from Offset 01H
10. LowerNibble = LowerNibbler AND 078H
11. Shift Right LowerNibble 3
12. Set SelNibble
13. HigherNibble = Read from Offset 01H
14. HigherNibble = HigherNibbler AND 078H
15. Shift Left HigherNibble 1
16. SampleValue = HigherNibble OR LowerNibble
17. Set /CLK
18. Clear /CLK
NEXT Byte
Disclaimer: No warranty at all!
Copyright by Martin Clausen, Germany.
Contact the author: mc AT rotgradpsi DOT de
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